Conventionally, there has been known a semiconductor device which is referred to as the JBS structure (for example, see Patent literature 1). FIG. 18A and FIG. 18B are views for explaining a conventional semiconductor device 900. FIG. 18A is a cross-sectional view schematically showing the conventional semiconductor device 900, and FIG. 18B is a view showing a state where a depletion layer 960 extends when a reverse bias is applied to the conventional semiconductor device 900. Since FIG. 18A and FIG. 18B are cross-sectional views which schematically show the conventional semiconductor device 900, the respective elements are drawn with suitable modification in these drawings. Accordingly, sizes of the respective elements, distances between the respective elements and the like are not always accurately expressed. The same goes for drawings which are used hereinafter.
As shown in FIG. 18A, the conventional semiconductor device 900 includes: a semiconductor base body 910 having the structure where the semiconductor base body 910 includes an n+ type semiconductor layer 912 and an n− type semiconductor layer 914, and the n+ type semiconductor layer 912 and the n− type semiconductor layer 914 are laminated to each other in this order; p+ type diffusion regions 920 which are selectively formed on a surface of the n− type semiconductor layer 914; and a barrier metal layer 930 which is formed on the n− type semiconductor layer 914 and p+ type diffusion regions 920, forms a Schottky junction between the barrier metal layer 930 and the n− type semiconductor layer 914, and forms an ohmic junction between the barrier metal layer 930 and the p+ type diffusion regions 920. In FIG. 18A and FIG. 18B, symbol 940 indicates an anode electrode layer, and symbol 950 indicates a cathode electrode layer.
The conventional semiconductor device 900 has the structure where the barrier metal layer 930 is formed on the surface of the n− type semiconductor layer 914 and the surfaces of the p+ type diffusion regions 920 (that is, the JBS structure). Accordingly, as shown in FIG. 18B, when a reverse bias is applied to the conventional semiconductor device 900, the whole region of the surface of the n− type semiconductor layer 914 is pinched off due to the depletion layer 960 extending toward an n− type semiconductor layer 914 side from boundary surfaces between the n− type semiconductor layer 914 and the p+ type diffusion regions 920 and hence, a reverse withstand voltage VR can be increased, and a leak current IR can be lowered.